Example embodiments of the present inventive concepts relate to a memory device and/or a memory system having the memory device. For example, at least some example embodiments relate to a memory device which can adaptively compensate for a bit line leakage current depending on temperature using a proportional to absolute temperature (PTAT) current, and/or a memory system having the same.
A NAND flash memory cell may be divided into an on-cell and an off-cell depending on a program. When the memory cell is an on-cell, currents flowing in a bit line are referred to as on-cell currents, and when the memory cell is an off-cell, currents flowing in the bit line are referred to as off-cell currents.
As a process is refined, an operation voltage may be lowered, and thereby the on-cell currents may be reduced, and leakage currents of a bit line may increase at a high temperature (for example, 85° C. to 150° C.). When the off-cell is read, the off-cell may be sensed as the on-cell by mistake due to the leakage currents flowing through the bit line, thereby reducing a sense margin of the on-cell and the off-cell.
A current generator for generating load currents to compensate for the leakage currents of the bit line may be disposed on an integrated circuit including a NAND flash memory cell. However, the leakage currents of the bit line are proportional to temperature, but the load currents generated by the current generator are inversely proportional to the temperature. Accordingly, the load currents are unnecessarily generated at a low temperature (for example, −25° C. to −40° C.)